A Set Combine Map Method for Manual Synthesis of Logic Circuits

An efficient technique of multiple input digital circuit minimizations is proposed in this paper. The proposed method is very simple and less laborious approach to determine the minimal gate count for multiple input digital switching circuits. This exact method of minimization technique provides a minimal solution based on the breaking of minterms and arrange them in adjacent groups. To avoid bulky size of the truth table for multiple input combinational circuits, a reduced truth table is proposed here and this methodology is able to reduce its present size and at least one operation per minterms. A recursive algorithm for breaking of minterms and set formation is proposed here for computer programming. A 'Set Combine Map' is also proposed here to determine the optimal solution for manual synthesis. The proposed 'Set Combine Map' will be able to overcome successfully all the problems related to Karnaugh Map simplification process for more than four inputs systems by reducing complexity arises in finding and grouping of adjacent minterms in different levels of Karnaugh Map. An efficient minimization technique for multiple inputs and multiple outputs switching system is also proposed here.